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 B10011S
CAN Transceiver
Description
The device B10011S is a transceiver for CAN bus systems with high transmission levels according to ISO WD 11992-1 (point-to-point interface between trucks and trailers). The special features of a circuit containing this device allow transmission which is insensitive to electromagnetic interference that can appear particularly in truck applications, where, due to the length of the wires, high common-mode voltages (e.g., 50 V) can be coupled into the lines. This device contains a fault recognition circuit for faults on one of the two wires which are normally used for transmission. If a fault occurs on one of the wires, the operation can be switched from double-wire to single-wire mode, thus allowing proper operation even if one wire is broken, has a short-cut or a high series resistance.
Features
The CAN driver B10011S is a low-speed, high-level interface for 24-V (27-V) operation. It is developed for signal levels of 8/16 V and a speed of up to 250 kbits/s. Special features are: D Especially suited for truck and van applications D Interface between truck and trailer D Interface between dashboard and engine D High reliability
Benefits
Systems which employ this device have the following benefits in comparison with solutions using discrete components: D Capability of single-wire operation D Hardware fault recognition D Inputs with high common-mode and differentialmode interference rejection above 100 VPP due to external filters at the receiver input D Immunity against electromagnetic interference D Low cost D Immunity against ground-voltage offsets < 6 V D Ruggedized against ESD by MIL-STD-883C, method 3015
Block Diagram
1 2 3 4 2.5 V 5 6 7 8 VDD VSS B10011S Error control Output control Select control +4.3 V Compa- rators 16 15 14 VCC 13 12 11 10 GND 9
Figure 1. Block diagram
Rev. A2, 28-Feb-00
1 (10)
B10011S
Ordering Information
Part Number B10011S-MFP B10011S-MFPG1 Package SO16 in tubes SO16, tape and reel, 1000 units/reel
Pin Description
16-lead SOIC (SO16), small outline gull-wing Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol Asel Bsel ER Rx1 Rx0 Tx0 VDD VSS SGND L' H' VCC S+ F0 F1 Function Select control input Select control input Error signal output Reference voltage 2.5 V Receiver output Transmitter input Controller supply voltage 5 V Controller supply voltage 0 V Collector of internal npn switch Vehicle ground 0 V Data out driver Data out driver Vehicle power supply 24 V Control output for external pnp Receiver input Receiver input
Absolute Maximum Ratings
Parameters Supply voltage Controller supply voltage Input voltage at any input Junction temperature Storage temperature range Soldering temperature (for 10 sec. maximum) Symbol VCC VDD Vin Tj Tstg Tsld Value -0.5 to +36 -0.5 to +5.5 -0.5 to VDD 150 -55 to +150 260 Unit V V V C C C
Operating Conditions
Parameters Supply voltage car battery Controller supply voltage Control input voltage Input voltage Operating temperature Symbol VCC VDD Asel, Bsel Tx0 Tamb Value 7 to 32 4.75 to 5.25 0 to VDD 0 to VDD -40 to 105 Unit V V V V C
2 (10)
Rev. A2, 28-Feb-00
B10011S
Operating Modes
0 = 0 V, 1 = 5 V Asel 0 1 0 1 Bsel 0 0 1 1 Rx0 3.8 V From H From L From L-H H, L drivers disabled, L load disabled, S-, S+ disabled station not in operation, but consuming current Single-wire H, L driver, L load, S-, S+ disabled Single-wire L, H driver disabled Two-wire operation, normal mode possible by changing the Asel and Bsel state. Asel and Bsel have an internal pull-up resistor. Therefore, the no-connect state is 1, but connection to VDD is recommended when not in use.
ER (error signal) is low when normal operation is disturbed by line faults (interruption, short to ground or to VCC, H to L short disturbance by high voltage transients). After a waiting period due to transient delays, the controller is asked to test if single-wire operation is
Pulse Diagram
The pulse diagram for two connected, identical stations is shown below. The resistor levels have to be kept constant when additional stations are connected.
Txo 5V dominant 0V recessive 4 ms min *) Rxo t
5V
0V
t
27 V L 18 V 9V H
0V
t
27 V L' 18 V H' 9V 0V t
*) Filter has to be changed if short distances are to be allowed. Rev. A2, 28-Feb-00 3 (10)
B10011S
Electrical Characteristics
VCC = 27 V, VDD = 5 V, VSS = 0 V, Tamb = -40 to +105C, unless otherwise specified Test condition: test circuit (see figure 2), 0 = 0 V, 1 = 5 V Parameters Supply current Test Conditions / Pins Tx0 = 0, Asel = 1, Bsel = 1 Tx0 = 0, Asel = 0, Bsel = 0 Tx0 = 1, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 1 Tx0 = 0, Asel = 1, Bsel = 0 VIL(F0) = 1.9 V, VIH(F1) = 2.7 V Tx0 = 1, Asel = 1, Bsel = 1 VIL(F1) = 1.9 V, VIH(F0) = 2.7 V Tx0 = 0, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 1 Tx0 = 0, Asel = 1, Bsel = 1 No fault Fault on line Symbol ICC IDD ICC IDD I(Tx0) I(Asel, Bsel) Rx0 Rx0 U(H') U(H') U(L') U(L') ER ER Min. Typ. Max. 15 22 26 16 650 150 1.0 Unit mA mA mA mA mA mA V V V V V V V mV
Input current Output voltage
3.8 24.5 1.0 26 1.0 4.7 100
Electrical Characteristics
VCC = 7 C, VDD = 4.75 V, VSS = 0 V, Tamb = 25C, unless otherwise specified Test condition: test circuit (see figure 2), 0 = 0 V, 1 = 5 V Parameters Output voltage Test Conditions / Pins Tx0 = 0, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 0 Tx0 = 0, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 0 VIL(F1) = 1.0 V, VIH(F0) = 1.15 V Tx0 = 0, Asel = 1, Bsel = 0 VIL(F0) = 1.0 V, VIH(F1) = 1.15 V Symbol U(H') U(H') U(L') U(L') Rx0 Rx0 Min. 4.5 6.5 1.0 3.3 1.0 Typ. Max. 100 Unit V mV V V V V
Electrical Characteristics
VCC = 32 V, VDD = 5.25 V, VSS = 0 V, Tamb = 25C, unless otherwise specified Test condition: test circuit (see figure 2), 0 = 0 V, 1 = 5 V Parameters Output voltage Test Conditions / Pins Tx0 = 0, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 0 Tx0 = 0, Asel = 1, Bsel = 1 Tx0 = 1, Asel = 1, Bsel = 0 VIL(F1) = 1.6 V, VIH(F0) = 2.7 V Tx0 = 0, Asel = 1, Bsel = 0 VIL(F0) = 1.6 V, VIH(F1) = 2.7 V Symbol U(H') U(H') U(L') U(L') Rx0 Rx0 Min. 29 31.5 1.0 4.0 1.0 Typ. Max. 500 Unit V mV V V V V
4 (10)
Rev. A2, 28-Feb-00
B10011S
Test Circuit
470 H/L VDD H/L 150k VDD 470 1 2 3 4 1k8 220 470 1k8 VDD H/L 5 6 7 8 Asel Bsel ER Error control 2.5 V Rx0 Tx0 Output control Select control Compa- rators F1 F0 S+ VCC 16 15 VIL
+4,3 V
VIH
14 13 580
VCC VCC
H' 12 L' 11
620 VCC
VDD VSS B10011S
GND 10 S- 9 2k5 VCC
Figure 2. Test circuit
Applications Information
+5V Asel Bsel ER to CAN controller Rx1 Rx0 Tx0 VDD + VSS 10m F 150k 2n2 1 2 3 4 2.5 V 5 Output control 6 7 VDD 8 VSS 0m1 M Resistors: MELF 0204, 1%, 0.6W 02075, 1%, TK50 Chip capacitors NPO 0805, 1206, 10% Ferrite bead BLM 31A601S (Murata) Common-mode choke coils (SMD): B82790 S0513 N201 (Siemens) F2 2x50 mH (Vogt) ST2001 (Vogt) 2 Cable LiYY 4x1 mm Battery ground L H GND 9 Error control Select control Compa- rators +4.3 V VCC Filter for 125 kbit/s operation 16k 16 VDD 15 14 BCX 17 13 12 10m + 11 40V 10 1k8 1k8 1k8 220 270 VCC 1k8 1k8 1k8 24k 5k6 82p 16k 47p 22k 24k 5k6 82p 22k 47p
Filter ground
Figure 3. Application circuit
Rev. A2, 28-Feb-00
5 (10)
B10011S
The implementation of a power filter and overvoltage clamp as follows is highly recommended:
From battery (cl. 15) 10 + 33 V Ground 22 mF To Pin 10 To VCC (Pin 13)
Application Hints
As an interface between CAN controllers and a two-wire data-bus system for serial data interchange, this device is adapted to a special high-level, low-speed transmission system which is useful in harsh environments. High immunity against ground offset and interference voltages on the bus have been the design goals for this device, rather than low power consumption or a minimum of external components. An error detection scheme is implemented in the receiver part to give quick information to the controller in case of faults occurring on the bus. Thus, the controller is able to start a search cycle in order to look for the possibility of single-wire operation or to disable the station from the bus. An automatic error-signal end is not feasible because parts of the system are disabled during single-wire operation. Therefore the controller has to carry out short tests by switching to the two-wire state and checking whether the error signal is still present or not. Errors due to dirty contacts, shorts between high and low line, or interruptions may not be recognized at all, because this device does not contain a complete fault computer. Two control inputs Asel and Bsel enable four operation modes (see table ``operation modes''). Depending on the nature of the error, the error signal ER is internally generated partly in the recessive or partly in the dominant transmission state. In order to avoid watching the error bits bitwise, an open-collector output driver (with a 1-kW series resistor) discharges a storage capacitor, which is charged by a time constant, long enough to hold the 0 state for e.g., 200 ms, thus giving the controller enough time to recognize this status during idle times. Only the charging resistor may be changed and not the 2.2-nF capacitor. In order to perform a faster error-end test, the charging resistor may be shorted by an npn emitter follower or by tri-state output high for approximately 1 to 2 ms. The pinout of the device shows a controller side (pins 1 to 8) and a bus side (pins 9 to 16). The application circuit utilizes an input filter section which is necessary for every station and a bias section which is needed in two master stations only. Additional slave stations only contain the 6 (10) driving resistors at pins 11 and 12 (270 W and 220 W), the choke coil, and capacitor between pins 13 and 10. A power filter and overvoltage clamp is highly recommended in order to avoid transmission errors due to spikes on the 24-V battery voltage. The input filter is designed as a 2-RC filter for 125 kbit/s and may be changed to 250 kbit/s. Its good pulse response and good suppression of high frequencies should not be weakened by omitting one of the capacitors. All the logical and sensing functions in the device are powered by VDD = 5 V. Therefore the filter section also acts as a level shifter to the input comparator range (approximately 1 to 3.3 V). The diagram (comparator thresholds) shows how the battery voltage, VCC, influences the comparator input voltages, F0 and F1, in relation to the internal reference voltage, Vref, in the recessive state. The lower VCC, the lower the bus level. Taking this into account the comparator input levels are F1 - Vref for single-wire H respectively F1 - F0 for twowire operation. The comparator's offset voltage is v 10 mV. Matching the filter biasing to the internal reference is essentially for safe operation even at low battery voltages during motor start. The level investigations and tests described in the following description have been carried out within the temperature range of -40 to +105C with two B10011S on a bus line, one of them always in the recessive state. See test circuit equivalents. In case of line shorts to VCC or to ground or in case of H to L shorts, all participants on the bus are intended to switch to single-wire operation and to disable their drivers not in use. The dynamic behavior of the circuit depends on the line capacitances to ground. Approximately 200 pF/m and a maximum of 6 nF have to be taken into account. The transition from the dominant to the recessive state enables the bias network to recharge the line through a driving resistor of approximately 300 W. The transition from the recessive to the dominant state is approximately twice as fast. This is probably the source of emitted radiation having no capacitance on the line. The choke coil enables for the suppression of this radiation in the frequency range Rev. A2, 28-Feb-00
B10011S
above 5 to 7 MHz. Care should be taken not to feed noise from VDD or VCC to the line. Therefore, they should be properly blocked by low-inductance capacitors. Data loss by externally induced interference is avoided by careful PCB layout and EMC design for this circuit as well as by providing appropriate overvoltage protection. It is very essential to separate battery ground and filter ground as indicated in the application circuit (figure 3). Especially the filter ground must be connected to pin 8 by
Volt 5 RxN 4 F0 Uref 2 F1 1 not ER
a short connection not subject to disturbing currents from external sources. The ground wire of the ``starquad'' cable may introduce such currents and should be connected to battery ground via a 0.1-mF capacitor on a way as short as possible, perhaps to the metal housing. In order to avoid thermal problems, the voltage divider and driving resistors should be kept away from the IC. Otherwise they would heat up the environment of the small IC and might reduce its life expectancy.
3
0 5 10 15 20 25 30 35 VCC
Figure 4. Comparator thresholds
Rev. A2, 28-Feb-00
7 (10)
B10011S
Test Circuit Equivalents
VCC H' 300 H 300 2/3 VCC
300 L' L
300 1/3 VCC
Switches are closed in the dominant state
Ideal test circuit equivalent
38k F1 VCC
220
4k54
0.946 V
H
300
2/3 VCC
270 L
300 1/3 VCC
Switches are closed in the dominant state
38k F0
4k54
0.946 V
Real test circuit equivalent
2CHL H CH0
L
CL0
Capacitance H: CHgnd = CH0 + 2 CHL <= 200 pF/m Capacitance L: CLgnd = CL0 + 2 CHL <= 200 pF/m Figure 5. Test circuit
8 (10)
Rev. A2, 28-Feb-00
B10011S
Package Information
Package: SO16
Pin 1
3.80 $0.25
6.0 $0.3
9.9 $0.3
0.18 $0.08
1.55 $ 0.2
1.27
0.42$ 0.07
0.22 $0.03 0.7 $0.1
Rev. A2, 28-Feb-00
9 (10)
B10011S
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
1.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify TEMIC Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Data sheets can also be retrieved from the Internet: http://www.temic-semi.com
TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423
10 (10)
Rev. A2, 28-Feb-00


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